Analysis and Design of High Speed Low Power Comparator in ADC
نویسنده
چکیده
The fast growing electronics industry is pushing towards high speed low power analog to digital converters. Comparator is electronic devices which are mainly used in Analog to Digital converter (ADC). In ADC they are used for quantization process, and are mainly responsible for the delay produced and power consumed by an ADC. A high speed low power comparator is required to satisfy the future demands. The circuits presented in this paper are designed using 0.18μm CMOS technology with 1.8v bias voltage and 12μA bias current. This paper also discusses the advantage of using programmable hysteresis to the comparators. Tanner EDA environment is used for the design and simulation for the comparator circuits. Comparison of the proposed comparator with existing double tail comparator is performed and the result is discussed in detail.
منابع مشابه
A 12 bit 76MS/s SAR ADC with a Capacitor Merged Technique in 0.18µm CMOS Technology
A new high-resolution and high-speed fully differential Successive Approximation Register (SAR) Analog to Digital Converter (ADC) based on Capacitor Merged Technique is presented in this paper. The main purposes of the proposed idea are to achieve high-resolution and high-speed SAR ADC simultaneously as well. It is noteworthy that, exerting the suggested method the total capacitance and the rat...
متن کاملAnalysis and Design of Double Tail Dynamic Comparator in Analog to Digital Converter
The need for ultra low-power, area efficient and high speed analog-to-digital converters is pushing toward the use of dynamic regenerative comparators to maximize speed and power efficiency. The objective of this paper is to design and implementation of delay efficient and low power consumption double-tail dynamic comparator in successive approximation analog to digital convertor. The conventio...
متن کاملDesign of a 45nm TIQ Comparator for High Speed and Low Power 4-Bit Flash ADC
The continued speed improvement of serial links and appearance of new communication technologies, such as ultra-wideband (UWB), have introduced increasing demands on the speed and power specifications of high-speed low-tomedium resolution analog-to-digital converters (ADCs).This paper presents the design of high speed and ultra low power comparator of a 4-bit ADC. The comparator used is Thresho...
متن کاملAnalysis of Low Power and Area efficient CMOS Comparator Design
In this Paper presents a new dynamic comparator is compared in terms of their voltage, speed and power. A new dynamic comparator which shows lower input offset voltage and high load drivability than the conventional dynamic comparators. This comparator not only achieves low offset but also exhibit high speed and low power in its operation, which can be used for low power high speed ADC applicat...
متن کاملAnalysis and Design of High Speed Low Power Comparator in ADC
the fast growing electronics industry is pushing towards high speed low power analog to digital converters. Comparator is electronic devices which are mainly used in Analog to Digital converter (ADC). In ADC they are used for quantization process, and are mainly responsible for the delay produced and power consumed by an ADC. A high speed low power comparator is required to satisfy the future d...
متن کامل